Silicon Optoelectronics

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Technology Work Group

Chairs

Jerry Bautista, Intel
Michael Morse, Intel
Jeffrey Swift, formerly Analog Devices


Participants: MIT and Industry Consortium Member Companies

MIT
Elizabeth Bruce
Luca Dal Negro
Gene Fitzgerald
Cliff Fonstad
Fuwan Gan
Franz Kaertner
Lionel Kimerling
Fred Leonberger
Jurgen Michel
Rajeev Ram
Ted Sargent
Harry Tuller
Richard Williamson
Yiwen Zhang
Analog Devices
John Yasaitis
Shrenik Deliwala

Nortel Networks
Bob Hadaway
Dominic Goodwill

Pirelli
Luciano Socci






Participants: Other Companies

Agilent
Waguih Ishak
Brian Lemoff

IBM
Jeff Kash

Inplane
Joseph Shmulovich


JDS Uniphase
Ed Murphy

Little Optics
John Hryniewicz
Brent Little
Bill Wilson

Lucent Technologies
Mike Schabel
Alice White
LNL Technologies
Kevin Lee

Luxtera
Roger Merel

Xponent, Inc.
Hank Blauvelt



Summary

Silicon-based microphotonics has been under great scrutiny in recent years. The prospect of extending a massive, low cost electronics manufacturing platform into the photonics domain is the subject of much research and debate. What has become more clear is that an important driver for the debate is the intrinsic distance × bandwidth limitation of electronic communications links. In other application domains, typically, photonic links are utilized once these electronic limitations have been encountered. Photonic link standards of many kinds have been developed to support such demands in the past. These standards represent a historical context for a silicon microphotonics roadmap—and yet they may impede its development. A roadmap is starting to emerge focused not on how silicon microphotonics can implement existing standards, but rather on how silicon microphotonics supports the migration of network bandwidth in an important way.

To provide a truly compelling solution, silicon microphotonics will likely need to achieve a high degree of monolithic integration with at most a small degree of hybrid integration, (e.g. laser sources) in order to offer low cost and increased functionality. This will probably involve new photonic materials, (e.g. Ge, BaTiO3, SiON, and so on) near the process back-end. Although this adds manufacturing complexity, this trend is also occurring in advanced CMOS to allow Moore's Law scaling and new functionality, such as high-k gate dielectrics and MRAM's.